I2C总线标准（英文版）V2.1

本文档提供了I2C总线标准的英文版V2.1，可供与中文版对照阅读。以下是文档目录：

1. PREFACE

   • 1.1 Version 1.0 - 1992
   • 1.2 Version 2.0 - 198
   • 1.3 Version 2.1 - 1999
   • 1.4 Purchase of Philips I2C-bus components

2. THE I2C-BUS BENEFITS DESIGNERS AND MANUFACTURERS

   • 2.1 Designer benefits
   • 2.2 Manufacturer benefits

3. INTRODUCTION TO THE I2C-BUS SPECIFICATION

4. THE I2C-BUS CONCEPT

5. GENERAL CHARACTERISTICS

6. BIT TRANSFER

   • 6.1 Data validity
   • 6.2 START and STOP conditions

7. TRANSFERRING DATA

   • 7.1 Byte format
   • 7.2 Acknowledge

8. ARBITRATION AND CLOCK GENERATION

   • 8.1 Synchronization
   • 8.2 Arbitration
   • 8.3 Use of the clock synchronizing mechanism as a handshake

9. FORMATS WITH 7-BIT ADDRESSES

10. 7-BIT ADDRESSING

    • 10.1 Definition of bits in the first byte
      • 10.1.1 General call address
      • 10.1.2 START byte
      • 10.1.3 CBUS compatibility

11. EXTENSIONS TO THE STANDARD MODE I2C-BUS SPECIFICATION

12. FAST-MODE

13. Hs-MODE

    • 13.1 High speed transfer
    • 13.2 Serial data transfer format in Hs-mode
    • 13.3 Switching from F/S- to Hs-mode and back
    • 13.4 Hs-mode devices at lower speed modes
    • 13.5 Mixed speed modes on one serial bus system
      • 13.5.1 F/S-mode transfer in a mixed-speed bus system
      • 13.5.2 Hs-mode transfer in a mixed-speed bus system
      • 13.5.3 Timing requirements for the bridge in a mixed-speed bus system

14. 10-BIT ADDRESSING

    • 14.1 Definition of bits in the first two bytes
    • 14.2 Formats with 10-bit addresses
    • 14.3 General call address and start byte with 10-bit addressing

15. ELECTRICAL SPECIFICATIONS AND TIMING FOR I/O STAGES AND BUS LINES

    • 15.1 Standard- and Fast-mode devices
    • 15.2 Hs-mode devices

16. ELECTRICAL CONNECTIONS OF I2C-BUS DEVICES TO THE BUS LINES

    • 16.1 Maximum and minimum values of resistors Rp and Rs for Standard-mode I2C-bus devices

17. APPLICATION INFORMATION

    • 17.1 Slope-controlled output stages of Fast-mode I2C-bus devices
    • 17.2 Switched pull-up circuit for Fast-mode I2C-bus devices
    • 17.3 Wiring pattern of the bus lines
    • 17.4 Maximum and minimum values of resistors Rp and Rs for Fast-mode I2C-bus devices
    • 17.5 Maximum and minimum values of resistors Rp and Rs for Hs-mode I2C-bus devices

18. BI-DIRECTIONAL LEVEL SHIFTER FOR F/S-MODE I2C-BUS SYSTEMS

    • 18.1 Connecting devices with different logic levels
      • 18.1.1 Operation of the level shifter

19. DEVELOPMENT TOOLS AVAILABLE FROM PHILIPS

20. SUPPORT LITERATURE

此文档详细介绍了I2C总线标准的各个方面，包括其概念、特点、数据传输、寻址方式、电气规格等。对于设计人员和制造商来说，这份文档具有很高的参考价值。